Design And Reuse

Customizing Foundation IP to Meet Low-Voltage Requirements

Synopsys is different. With the industry’s most comprehensive and adaptable Foundation IP portfolio, a world-class R&D engine ...
Design And Reuse

Innosilicon to Showcase High-Speed Interface IP and Advanced SoC Solutions at the 2025 TSMC OIP Ecosystem Forum

Innosilicon’s IP portfolio includes a wide range of advanced high-speed interface subsystems. The key IP Trio for Next Gen AI, such as LPDDR6/5X Combo, GDDR7/6X, MR DDR5, UCIe Chiplet, UALINK, PCIe ...
Design And Reuse

Weebit Nano Joins EDGE AI FOUNDATION to Advance Intelligent Systems at the Edge

Pete Bernard, CEO, EDGE AI FOUNDATION, said: “ The EDGE AI FOUNDATION is dedicated to building a dynamic ecosystem that makes intelligent systems more capable, efficient, and sustainable. We are ...
Design And Reuse

Xiphera and iWave Partner to deliver secure solutions on Altera FPGAs

Xiphera Ltd and iWave Global have entered into a collaboration to combine Xiphera’s advanced cryptographic solutions with iWave’s extensive portfolio of Altera FPGA-based boards and solutions.
Design And Reuse

Cadence Partners with TSMC to Power Next-Generation Innovations Using AI Flows and IP for TSMC Advanced Nodes and 3DFabric

Design-in ready IP, including HBM4 and LPDDR6/5x on TSMC N3P, enables next-generation AI infrastructure SAN JOSE, Calif. -- Cadence (Nasdaq: CDNS) today announced major advancements in chip design ...
Design And Reuse

eMemory Recognized with 16th TSMC Open Innovation Platform® (OIP) Partner of the Year Award

Hsinchu, Taiwan, September 25, 2025-- eMemory, the world’s leading provider of embedded non-volatile memory (eNVM) and security IP, has been selected as the 2025 TSMC Open Innovation Platform ® (OIP) ...
Design And Reuse

AI-Driven and Traditional Approaches to Accident Scenario Reconstruction

A modern approach applies artificial intelligence to accident reconstruction by mining large-scale accident databases ...
Design And Reuse

Siemens collaborates with TSMC to accelerate 3D IC and AI-driven circuit and systems design

Our longstanding relationship with TSMC underscores the transformative power of collaborative innovation,” said Mike Ellow, CEO, Siemens EDA, Siemens Digital Industries Software. “By combining Siemens ...
Design And Reuse

M31 Advances AIoT Innovation with Ultra Low Power Memory Compilers on TSMC N6e Platform

Hsinchu, Taiwan – September 25, 2025 – M31 Technology Corporation (M31), a leading silicon intellectual property (IP) provider, today announced its latest Ultra-Low Leakage (ULL), Extreme Low Leakage ...
Design And Reuse

Perceptia Introduces pPLL08N: A Family of Compact Narrow-Band RF PLLs which Complement pPLL08W

Sydney, Australia – September 25, 2025 – Perceptia Devices, a leader in low-jitter clocking IP, today announced the launch of its latest product, pPLL08N, a family of narrow-band RF phase-locked loops ...
Design And Reuse

proteanTecs Announces Silicon-Proven IP on TSMC's Advanced N2P Process

proteanTecs Hardware Monitoring System has been integrated into a customer test chip, targeted to high-performance markets. Silicon samples have been delivered and extensive bring-up and ...
Design And Reuse

Alphawave Semi Taped-Out Industry Leading 64Gbps UCIe™ IP on TSMC 3nm for the IP Ecosystem, Unleashing Next Generation of AI Chiplet Connectivity

Breakthrough Gen3 UCIe IP subsystem achieves 64 Gbps per-I/O pin data rates and doubles shoreline bandwidth density, enabling scalable XPUs, and data center chiplet architectures with TSMC's 3nm ...